Miniaturization of semiconductor device has been an important topic in the art, when the device requires more I/O pins along with the increase of device density. The multiple I/O pins, however, require the lead pitch of the package device to be smaller. As a result, the leads become more fragile to external impacts, the performance of the final package device may degrade due to parasitic parameters of the thinner package leads, and more attention should be paid in management of the package device.
Ball Grid Array (hereinafter abbreviated as “BGA”) packages known from e.g., U.S. Pat. No. 5,355,283 are new and upgraded versions of PGA (Pin Grid Array) packages. The BGA packages are more suitable for use in high I/O pin devices than PGA packages, since they can avoid negative inductive parameters of the long pin leads of the PGA package while maintaining the efficiency of the I/O pins of the Grid Array packages. Further, the BGA package is capable of high mounting density since it can, unlike the PGA package, utilize a Surface Mount Technique (SMT).
FIG. 1 shows a conventional BGA package 10. A semiconductor chip 11 on which a predetermined circuit pattern is formed through a wafer process is mounted onto a substrate 12, for example, printed circuit board (PCB). The electrical interconnection between the chip 11 and the PCB 12 is achieved by bonding wires 13. An encapsulation resin 14 such as an epoxy molding compound is used to protect the chip and the bonding wires from the external environment. On the bottom surface 15 of the PCB 12 are attached a plurality of solder balls 16. Because the solder balls 16 and the semiconductor chip 11 are electrically interconnected by a pre-designed wiring pattern (not shown) within the PCB 12, both electrical signals from external devices to the chip 11 and data signals from the chip 11 can pass through the solder balls 16. Particularly, if the solder balls 16 were used as supply power or ground power terminals, the shorter electrical length of the solder balls 16 would reduce the inductance and resistance of the package leads. The solder balls 16 further contribute to the heat dissipation from the semiconductor chip 11.
However, the amount of bonding wires 13 is limited by the size of the BGA package 10. In other words, the more bonding wires contained the larger the BGA package 10 has to be. Meanwhile, the height of the BGA package 10 is also limited by the bonding wires 13.
Thus, in order to accomplish miniaturization of semiconductor device there is a demonstrated need for an image sensing device having improved interconnection, especially between the chip and the PCB, and a method of packaging the same.